On my flash programmer, I drive CS, RD, and WR high. I actually need to tri-state them when ENABLE is high. Back to Lattice ispLEVEL Classic…. Otherwise, they’ll conflict with the Z-80.

I also want to play with pin constraints. Haven’t done that yet. I’m hoping that pin constraints don’t interfere with the ability to fit the design into the CPLD. I’m not sure how much flexibility I lose when I constrain pins.